Nios Development board - Clock

Hi,

I know that this website is more software, but if someone can help, it is much appreciated. I posted these 2 messages on google fpga group as well. Thanks.

*******************************Message 1*************************

Dear,

I have a question regarding the "SMA connector J4" available on the

Nios Development board, Stratix Edition. Can we use it only for a generic

input signal? If yes, how can I set an input in the bdf file to read its value, I mean what is the pin name? I have an idea how to get the clock so this is not an issue.

Thanks in advance,

John.

*******************************Message 2*************************

Hi again,

After extensive reading and searching in documentation and board

schematic. I found the place of R15 and R13. It looks like these 2

resistors play the role of the controller of the multiplexer which

choose between the Y2 oscillator and the SMA connector. The question

is:

Does anyone know how to do the change asked in the note below? This

note is copied from the "Nios Development Board Reference Manual,

Stratix Edition"

Note to Figure 1-21:

(1) An external clock can be enabled by stuffing location R15 with a

49.9 ohm 0603 resistor and stuffing location R13 with a 330 ohm 0603

resistor.

Thanks in advance,

John