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Altera_Forum
Honored Contributor
Honored ContributorNios debugger and DDR2 problem
Hi everybody, The problem is downloading the nios software into the ddr2 memory. I use Quartus 11.sp1 with Qsys to build a system with internal RAM and a DDR2 Uniphy controller. The nios cpu...
Altera_ForumHonored Contributor
Honored ContributorHi,
I work together with the thread opener on this issue and will give an update here: I have looked at the issue in simulation and think, that the problem really arises due to the DM~ pins being tied to GND: For IOWR_32DIRECT Macro accesses it can be seen that the DM~ pins internal to the design are switching as if they should mask out the unused words in the burst access ... if these pins were connected to the memory the thing should work imho. Question is how to easily fix this: One idea would be to place another small transparent cache between the NIOS core and the DDR2 interface component. I would already have done that but I cannot find a cache component in the Qsys component library ... maybe someone got a hint where to find one. Best regards flint
