Nios crashes when reading from the DDR2

Thank you both for your replies. Yes, my design meets timing and I've run the .tcl files and included the .sdc file.

I spent the day making sure I had done everything right throughout my project. I am still having the same problem though!

Now, I've discovered that my Tis, Tih, Tds, Tdh values are not correct. But I don't know how to find the values in order to derate them. I think it would be a whole lot easier if the DE3 board documentation would specify these in their brief tutorial. I was originally using the values given for the Stratix III development board, but they are obviously different from board to board. Also, the DE3 documentation doesn't give any board trace delay values, so there is no way of me taking them into account in my timing analysis (unless there is another way of finding them).