Nios behaving erratically?

Here are some things to check:

1) Do you have a data cache? If so are you bypassing it when you talk to peripherals/share data with other processors in your system

2) Does Nios II talk to your FIFOs? If you communicate to it with a pointer do you declare the pointer volatile so that the compiler doesn't optimize it away (if the compiler sees you reading from the same location over and over it sometimes optimizes the other reads away and visa versa for writes).

3) Are you low on memory? Could be a heap + stack collision (if adding significant amounts of code fixes the problem then this is unlikely). These are hard to debug but you can try minimizing the code or filling a few locations with known data and seeing if it's getting clobbered by connecting to the system with the debugger.

4) Are you recompiling hardware? If so are you absolutely sure you have all your pins assigned? If not then Quartus II will move pins around to improve timing but this could cause functional problems on your board.

5) If you haven't already done so have your enabled -O0 software optimization?

6) If you use DCFIFO to go across clock domains have you setup the synchronized clock setting properly? (if your answer is "huh?" go with unsynchronized clocks so that an extra register is inserted)

7) Try stepping through code. Wherever in the code the CPU goes off into the weeds will help isolate the problem in most cases.

I put these in the order of the most likely culprits. This is not a complete list but it's a good starting place. Also I really doubt everyone is running into the same problem because there are many things that can cause issues like you have described.