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While it uses byte addressing, Nios master is 32bit wide and will access MM slaves with 32bit R/W.
Then your base addresses must be aligned to multiple of 4, otherwise overlaps or data misalignment occur.
Change base addresses to 0x11050 , 0x11054 and 0x11058
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http://www.alteraforum.com/forum/attachment.php?attachmentid=9377&stc=1 in the component editor(right click the ip=>edit ),i change the "
explicit address span"from 0 to 4,then return the Qsys and click file=>refresh system, then system=> assign base address, then the address changes, the end address minus the base address is 3(correspond to 32bit)
then i redo the project, the problem solved!
i have another question:
how to build a ip with several address?
like i visit base address, return value of reg1;
i visit base address + 0x04, return value of reg2?
i remember EDK of xilinx have the add custom ip wizard, in the wizard you can choose how many registers you want to use,and the wizard automatically generate the interface and the procotol of the bus of the microblaze. dose Qsys has the same function?
thanks again for the help!