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Jacob11's avatar
Jacob11
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Nios 2 I2c timeout altera_avalon_i2c.c - timeout never occurs

Hi gang. I am using the altera avalon i2c driver for communication to peripheral devices on my board. I want to read from different i2c addresses to determine if a device is present. For ins...
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi Jacob


The feature that you are looking for is the i2c probe.

Unfortunately the library does not support this feature.


As for the addressing, did you change the addressing mode from 7Bit to 10Bit addressing?

You could search for "ALT_AVALON_I2C_ADDR_MODE_10_BIT "


Regards

Jingyang, Teh


  • Jacob11's avatar
    Jacob11
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    Good morning Jingyang,

    I tried this but so far no success. Actually now I cannot read anything at all.

    I think the issue is that my devices have normal, 7/8 bit addresses. 0x57, for example. But the registers that I need to read in these devices are anywhere from 0x000 to 0x145.

    with address mode at default(7 bit), I can read any registers from 0x00 to 0xFF at address 0x57.

    By using the below code to try and set 10 bit addressing, I lose the ability to read everything. It just returns with a NACK error.

    is it possible with this driver to have 7 bit addresses, but 10 bit registers??

    I have this code now for configuration. Is this the correct way to do this??

    ALT_AVALON_I2C_DEV_t *gp_i2c3 = NULL;
    gp_i2c3 = alt_avalon_i2c_open(I2C_MASTER_3_NAME);
    gp_i2c3->address_mode = ALT_AVALON_I2C_ADDR_MODE_10_BIT;
    ALT_AVALON_I2C_STATUS_CODE status;
    ALT_AVALON_I2C_MASTER_CONFIG_t cfg;
    memset(&cfg, 0, sizeof(cfg));

    alt_avalon_i2c_master_config_get(gp_i2c3, &cfg);
    cfg.scl_hcnt -= ALT_AVALON_I2C_DIFF_LCNT_HCNT;
    cfg.scl_lcnt += ALT_AVALON_I2C_DIFF_LCNT_HCNT;

    alt_avalon_i2c_master_config_set(gp_i2c3, &cfg);

    // Set bus speed to 400Hz
    alt_avalon_i2c_master_config_speed_set(gp_i2c3, &cfg, 400);
  • Jacob11's avatar
    Jacob11
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    I have managed to find in the i2c driver from intel (i2c_interface.c) the following code inside the i2c_read_reg function:

    if (reg > 0xff) {
    txbuf[0] = reg;
    txbuf[1] = reg >> 8;
    txsize = 2;
    } else {
    txbuf[0] = reg;
    txsize = 1;
    }

    So there is at least some attempt to control the tx buffer when the value of the register is greater than 0xFF.

    This TX buffer is sent to the function

    alt_avalon_i2c_master_tx_rx(pdev, txbuf, txsize, rxbuf, rxsize, 0);
    This function can be found in the file altera_avalon_i2c.c:
    Something about this process is broken. As long as we remain in "else" everything works. As soon as
    the register goes above oxFF and we need this txsize = 2 we have issues.