Forum Discussion
Altera_Forum
Honored Contributor
13 years agoAFAIK if you use the regular pointers to write data (without setting the bit 31 on the address) and then flush the cache line, it will be written using a burst transfer.
I'm not sure you will gain that much speed though. Do you have that much latency on your slave? The CPU still needs to write the data word by word to the data cache, and this takes many cycles. If your slave has 1-2 clock cycles latency (and as dsl said it is the case with most Avalon slaves on a write access) you will probably not see the difference between IOWR and cache access with burst. If you really want a fast transfer, you need to use a DMA.