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matrixrv's avatar
matrixrv
Icon for New Contributor rankNew Contributor
5 years ago

Newbie

: Is for Avalon bus an Intel IP an formal equivalent with AXI Master from Xilinx ?
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
5 years ago

Avalon bus spec is different than AXI in xilinx. However, you can still make connect in btw them. The qsys will add synchronizer towards it.