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Altera_Forum
Honored Contributor
10 years agoHi DSL,
I am giving brief description about what i want to do in Cycleon V FPGA Board which is connected in Linux X86 System through PCIe Interface. I have assigned one custom controller in FPGA design which has some control registers, write master and read master. Now, I have configured only BAR 0 region in my system in which i have assigned one test register, on chip memory and control regusters of custom controller. Now, I have assigned start address of both master read & write component of my custom controller to one of section in BAR 0 region. Is it possible to read/write data directly through control registers by mapping read/write BAR 0 section into my Linux X86 System? Please let me know if you have any idea for that. Regards, Ritesh Prajapati