Need PCIe Driver of X86 PC for DMA Read/Write Support on QSYS Cycleon V FPGA System

I don't think there is any way to get an x86 system to initiate PCIe dma transfers.

So any dma transfers would have to be generated by the fpga. The simple dma controller won't generate suitable Avalon cycles, the scatter gather one will, but it is serious overkill (beware of the default sizes of its internal fifos).

Back to back write transfers from the x86 cpu actually seem reasonably fast, reads are another matter.

I suspect the fpga is delaying the pcie 'ack' that the cpu needs in order execute any more instructions for 128 clocks (of the 62.5MHz app clock).

There are similar delays (somewhere) when the fpga is the pcie master. Get the x86 cpu to do slave accesses to the fpga and the dma transfers speed up by a factor of 2!