Altera_ForumHonored Contributor21 years agoMy multiprocessor test design. hi, I spent more than 1 month to implement a multiprocessor system. It is made of two niosII cpu core and a modified uc/osII rtos is added to surport it. I'd like to share my ...Show More
Altera_ForumHonored Contributor21 years agosorry post two times for the reason of my poor net. how ot delete this one?
Recent DiscussionsDK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery failsWhere is FreeRTOS-Plus-TCP DesignSolvedNIOS V: Systick based timeouts not available when using internal timerSolvedAshling RISC Free IDE fails to download ELF fileNIOS V/m dbg_reset_out signal (Q25.1 Std, MAX10)