Honored ContributorHello,
Reading the tutorial about Multiprocessor systems, i understood that it is not possible to have multiple NIOSs executing a same program code from the same memory space. Does anybody know what is the problem with this? In fact, I would like to have MicroC/OS-II in a shared memory zone and then multiple processors accessing the OS's functions... Thanks
Honored ContributorI don't think there is anything that will stop that working, however it would require extreme care as all the data would have to be separate.
You might manage that with a fully custom 'OS' but the commerial OS won't run that way. Clearly 'tightly coupled' instruction memory can only be shared between 2 cpu - and then only if initialised in the fpga image. On-chip instruction memory accessed through the Avalon MM interface will probably give a performance penalty when the same block ends up being accessed by more than one cpu concurrently (compared to each using a separate block - but tightly coupled is much better anyway). External (SDRAM/DDR) memory accesses won't be any worse than if the cpus are accessing different regions - indeed they may be better if the memory page doesn't need changing (CAS only access).Honored ContributorI'm not sure of understand what you wrote. What do you mean by "all the data would have to be separate" ? What would be the problem with an OS like µCOS/II?
Honored ContributorIf you're running code, you're correct...there shouldn't be any issue, but how would you avoid one processor stomping all over the other's stack/heap space. This is what dsl is referring to...
Cheers, -slackerHonored ContributorIn fact, i shared the SRAM and SDRAM memories, the SDRAM is divided so each processor has its own space. Then i put the code sections (.text, .rodata...) in the SRAM and the stack and heap sections in the SDRAM private espace.
