Altera_ForumHonored Contributor12 years agomSGDMA DDR3 errors in data saved after X bytes I have Qsys system consisting of NIOS (+ associated peripherals), mSGDMA dispatcher, mSGDMA write master and custom block with avalon stream output. Dispatcher settings: Streaming to Mem...Show MoreCapture7.JPG167 KB
Recent Discussionsnot able to use multiple niosV cores at the same timeMultiple NIOS V ImplementationSolvedImplementing many Nios® V cores on Agilex™ 7SysID TimestampLPDDR4 not available in NIOSV/g linker script - Agilex-5, Quartus 26.1 Pro