Forum Discussion
Hello aiedb,
Have you evaluated Demonstrations/uart_usb design in MAX10_NEEK_v.1.0.7_SystemCD.zip?
After confirming the uart_usb design, we recommend to change uart_usb.qpf.
Here is a part of uart_usb.qpf file.
- #============================================================
- # GPIO
- #============================================================
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[0]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[1]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[2]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[3]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[4]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[5]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[6]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[7]
- ….
- #============================================================
- # UART
- #============================================================
- set_instance_assignment -name IO_STANDARD "2.5 V" -to UART_RESET_n
- set_instance_assignment -name IO_STANDARD "2.5 V" -to UART_RX
- set_instance_assignment -name IO_STANDARD "2.5 V" -to UART_TX
- ….
- set_location_assignment PIN_Y17 -to GPIO[0]
- set_location_assignment PIN_AA17 -to GPIO[1]
- set_location_assignment PIN_V16 -to GPIO[2]
- set_location_assignment PIN_W15 -to GPIO[3]
- set_location_assignment PIN_AB16 -to GPIO[4]
- set_location_assignment PIN_AA16 -to GPIO[5]
- set_location_assignment PIN_Y16 -to GPIO[6]
- set_location_assignment PIN_W16 -to GPIO[7]
- ….
- set_location_assignment PIN_E16 -to UART_RX
- set_location_assignment PIN_E15 -to UART_TX
If you want to assign uart pins to GPIO[7:6], here is an example. Red items should be changed.
- #============================================================
- # GPIO
- #============================================================
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[0]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[1]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[2]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[3]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[4]
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[5]
- #set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[6]
- #set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to GPIO[7]
- ….
- #============================================================
- # UART
- #============================================================
- set_instance_assignment -name IO_STANDARD "2.5 V" -to UART_RESET_n
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_RX
- set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to UART_TX
- ….
- set_location_assignment PIN_Y17 -to GPIO[0]
- set_location_assignment PIN_AA17 -to GPIO[1]
- set_location_assignment PIN_V16 -to GPIO[2]
- set_location_assignment PIN_W15 -to GPIO[3]
- set_location_assignment PIN_AB16 -to GPIO[4]
- set_location_assignment PIN_AA16 -to GPIO[5]
- #set_location_assignment PIN_Y16 -to GPIO[6]
- #set_location_assignment PIN_W16 -to GPIO[7]
- ….
- set_location_assignment PIN_Y16 -to UART_RX
- set_location_assignment PIN_W16 -to UART_TX
After changing the pin assignment, you need to recompile the design and generate POF again.
Regards,
Yoshiaki
hii thanks for reply
my question is not about how to assign the uart pins
i trying to practice the max10 remote update on my neek dev board
and i saw in an741
Remote System Upgrade for MAX 10 FPGA Devices
over UART with the Nios II Processor
there is a file called nios_application.pof as a part of the files needed to do the lab
my question is about how to generate nios_application.pof file that is part of the files that is needed for Programming into external QSPI flash,
this that consists Nios II processor software application hex file only.
i have built the qsys system for the rsu design and also i have the remote_update c source file and my quistion is how do i generate nios_application.pof
- YoshiakiS_Altera7 months ago
Occasional Contributor
Hello aiedb,
Sorry for misunderstanding your question.
You want to run AN741 on MAX10 NEEK instead of Max10 Devkit, right?
Please me give some time to run the design on Max10 Devkit first.
Regards,
Yoshiaki
- aiedb7 months ago
Occasional Contributor
hii you are right
i am trying to run the max10 rsu on neek , i don't have the max10 devkit i have the neek instead
i found a user guide that explains how to produce the nios_apllication.pof in the appendix i missed it i will try it out hope it will help me , if i have further questions i will get back to you .
but i noticed if i download the neek remote system update example from altera website , it doesn't come with the qsys sytem file so i can see the system in platform designer , can you send the file maybe ?
- YoshiakiS_Altera7 months ago
Occasional Contributor
Hello aiedb,
We can see app_image_1/OnChip.qsys, app_image_2/OnChip.qsys and Factory_image/OnChip.qsys after extracting max10_RSU.par on "Intel® MAX® 10 FPGA – Intel MAX 10 FPGA Remote System Upgrade (RSU) over UART for the Nios® II Processor Design Example". Is this the file you're looking for?
Regards,
Yoshiaki