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Altera_Forum
Honored Contributor
Honored ContributorMax throughput of SOPC DMA?
Hello, Currently I have a system with DMA transfers and DDR2 SDRAM (and a lot of other stuff). I'm using the normal SOPC builder DMA controller. I run the system on 100 MHz, the DDR2 SDRAM run...
Altera_ForumHonored Contributor
Honored ContributorThe on-chip memory will give about the same performance, with or without bursts. But I think that the SRIO core will slow down dramatically without bursts, as it will probably turn each read/write transaction into a SRIO packet. With bursts it would create less packets and I think that it would go faster.
The SGDMA is able to do larger transfers with bursts, up to 65536 bytes IIRC. But if you do a descriptor chain and regularly update it on the interrupt generated by the SGDMA, the software won't slow down the SGDMA controller, and it will run at almost 100% capacity even for big transfers. The old DMA core seems very limited with bursts, it is a shame it isn't able to do a transfer bigger than the burst length...
