Honored Contributor
Honored ContributorThinks ....
Having written a soft-float package (in ARM assembler) it strikes me that some simple combinatorial custom instructions (possibly just 1 that uses the rB field to decide what to do) would speed up soft float somewhat! Likely candidates: - Extract exponent, detecting NaN and Infinity - Extract and normalise mantissa (with and without sign) - Count leading zeros and count leading ones There also needs to be an easy way of doing 'add with carry' and 64bit shifts (for normalising values). Something built that way would be significantly faster than full soft-float, but using much less fpga real estate than the current custom code. It would also let you write 'double' (and maybe long double - 64 bit mantissa) support.
