Altera_Forum
Honored Contributor
9 years agomaster_write_32 doesn't come out of master
I have instantiated a JTAG to MM Master block in my FPGA. I can attach to it from the system console and open it without problem.
However, when I try to do a simple write: master_write_32 $path 0x0 0xdeadbeef It doesn't come out of the master according to signaltap. When I try to read it back: master_read_32 $path 0x0 1 I get: 0x000000ef. - only the low-order byte If I write multiple words, it still takes only that one byte and it doesn't send it out. I'm guessing that it's storing it internally. I thought maybe I needed some kind of slave in there, so I instantiated a (redundant) Slave to Master Bridge with full address map enabled and still get the same problem. Any ideas what could cause this? Thanks in advance.