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Altera_Forum
Honored Contributor
Honored ContributorLoad custom-data to On-Chip memory
Folks, what would be the best way to load custom data to the on-chip memory of a Cyclone IV FPGA, preferably at start up. Eventually a NIOS II application reads data from a flash device and sto...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- The on-chip memory is configured in Dual port mode, the 2nd interface is exported outside NIOS II in order to be accessible via my custom FPGA logic. --- Quote End --- Are You using QSYS? What exactly signals are exported from the 2nd interface of on-chip memory in dual-port mode? I see the following: https://www.alteraforum.com/forum/attachment.php?attachmentid=7952 What is a Write2 signal? Is it WriteEnable? And why the Read2 is missing? How then to read from on-chip memory via my custom FPGA logic? Where can I find the detailed description of all exported signals for Altera On-chip memory IP?
