Linux with MMU on NEEK

Hi,

--- Quote Start ---

"virtually-indexed and physically-tagged" ???

--- Quote End ---

So, I think that

3) CPU |--cache --| -- Memory

............|--MMU --|

is 'Bingo'.

--- Quote Start ---

How does this compare to ARM, that uses the cache and the MMU completely in the "wrong" order (strictly using physical addresses in the cache). Because of that, ARM-Linux needs to flush the cache completely with any task-switch. That is why for ARM systems with many task switches, not using the MMU is recommended.

I sincerely hope that such a drastic method is not necessary with NIOS !

--- Quote End ---

In NIOS, you don't need to flush the cache for each task-switch. But the TLB uses PID mechanism to distinguish each user tasks,

void set_mmu_pid(unsigned long pid) {
   WRCTL(CTL_TLBMISC, (RDCTL(CTL_TLBMISC) & (WAY_MASK << WAY_SHIFT)) | ((pid & PID_MASK) << PID_SHIFT));
}

so TLB flush and loading will occur automatically.

Kazu