Hi,
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OK, I found the manual (
http://www.altera.com/literature/hb/nios2/n2cpu_nii51003.pdf), and you are right, bit 31 is not used that way. However, virtual addresses 0xe0000000 and above are are mapped for I/O, skipping the TLB and the cache. So the behavior of ioremap is correct.
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Please be careful, because Wind River guys made a little bit confusing, meaningless and sometimes wrong macros around Nios MMU. For examples,
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
* Copyright (C) 2000, 2002 Maciej W. Rozycki
* Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
*/# ifndef _ASM_NIOS2_GENERIC_SPACES_H# define _ASM_NIOS2_GENERIC_SPACES_H
# include <asm/nios.h>
# define IO_BASE 0xa0000000 <--- ???
#define UNCAC_BASE 0xa0000000 <--- ???
/*
* This handles the memory map.
* We handle pages at KSEG0 for kernels with 32 bit address space.
*/# define PAGE_OFFSET (KERNEL_REGION_BASE + DDR2_TOP_BASE)
/*
* Memory above this physical address will be considered highmem.
*/# ifndef HIGHMEM_START# define HIGHMEM_START 0x20000000UL# endif
# endif /* _ASM_NIOS2_GENERIC_SPACES_H */
.
Kazu