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No. The cacheable Bit is in the page descriptor of each virtual page.
-Michael
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As far as I can tell though, all ioremap_nocache does for physical addresses (that is, all addresses below 0x20000000) is change them to something in the kernel's virtual address range and set bit 31. The processor still understands addresses above 0x80000000 as mirrors of those below that, but uncached. ioremap_nocache breaks though for those addresses, so I made this change:
--- a/arch/nios2/mm/ioremap.c
+++ b/arch/nios2/mm/ioremap.c
@@ -132,7 +132,7 @@ static int remap_area_pages(unsigned long address,
return error;
}
-#define IS_MAPPABLE_UNCACHEABLE(addr) (addr < 0x20000000UL)
+#define IS_MAPPABLE_UNCACHEABLE(addr) ((addr < 0x20000000UL) || (addr >= 0x80000000UL && addr < 0xA0000000UL))
/*
* Map some physical address range into the kernel address space.
@@ -172,10 +172,9 @@ void *__ioremap(unsigned long phys_addr, unsigned long size, int cacheflag)
IS_MAPPABLE_UNCACHEABLE(last_addr) &&
!(cacheflag & _PAGE_CACHED))
{
- return (void __iomem *)(0xe0000000UL + phys_addr);
+ return (void __iomem *)(0xe0000000UL + (phys_addr & 0x1fffffffUL));
}
And also added this (similar to Kazu's altera_tse patches):
// This works on NIOS II MMU when ioremap is done as in line 175 of ioremap.c
# define virt_to_phys2(vaddr) ((unsigned long) ((unsigned long)vaddr & 0x9fffffffUL))
This solved some other cache coherency problems I was having, but ethernet still doesn't work with 8k caches.
EDIT: this is probably more of a discussion for nios2-dev, but there doesn't seem to be any mail on it this month, is that list alive or has it moved?
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