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Altera_Forum
Honored Contributor
Honored ContributorLinux with MMU on NEEK
Hi, all. I'm testing Linux MMU version, on my NEEK. http://www.nioswiki.com/linux It works fine and I can use "bash" shell. This is the evident proof that we are using the true 'fo...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- If so, we can't have both instruction and data caches larger than page size(=4Kbytes). --- Quote End --- Is this confirmed by the hardware Gurus ? If yes this would slow down the CPU with dynamic memory greatly. I can't believe that Altera would choose such a silly implementation. I do know that ARM uses the "low latency" CPU->cache->MMU->RAM way, which needs a cache flush with any MMU table update and thus any task switch, thus very bad with complex OSes, while the PC uses the "correct" higher latency CPU->MMU->cache->RAM way, I was told NIOS features a "correct" implementation and with my first tests I found that the RAM latency in fact seems a lot greater than without an MMU and I took this for a confirmation.But of course I might be wrong. -Michael
