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Altera_Forum
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16 years ago

JTAG conflict when debugging dual NiosII system

We have a dual NiosII arhitecture implemented on a Altera StratixIII dev. kit. The processors only share a dual port ram for communciation, i.e. each (cpuA and cpuB) has its own ram and rom, everythi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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Make sure to load the .jdi file for each application project before debugging the code.

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spot on! Thanks a lot.