ISR driven UART is missing characters (even at 9600bps... same prob at 230400)

Can you feed the IRQ line itself out?

Or use signaltap to trace the information inside the fpga?

It might be that something is disabling interrupts - although the long latencies at only 960 baud do look 'iffy'.

I'd suggest using a hardware receive fifo instead of a software ring buffer - especially if you want to run at high baud rates.

Depending on what else the nios cpu is doing you may not even need to take a rx interrupt - just look at the fifo status where the code currently looks if anything has been written to the ring buffer.