Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Isp1362

Hello everybody ! Does anybody manage to make the isp1362 run under uCLinux with the OTG port configure as un host port? I'm working on Cyclone3 board FPGA ALTERA DEV board. I have took th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Here is my schematic.

All the OTG signal are connected to the isp1362 interface execpt OTG_DREQ0 and OTG_DREQ1.

CLKIN is connected to a PLL output wich generate an 12MHz signal.

Question : How the Nios manage the data transfert to the isp ? they are not on the same clock domain : the isp is 12 MHz and my Nios is 120MHz ?

Thanks is advance.