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originally posted by jdhar@Jul 5 2006, 01:51 PM
the only potential issue i have had was deriving the right frequencies; that's why i usually have two slots, one for a 50m and one for a 48m... they can get you different time bases. if you can get all of your frqeuencies with the one, then you should be ok. the only case i could see forming a problem was if you needed multiple output clocks from the fpga; you would ideally use the outputs of a pll for these clocks, and theres only one external output per pll... so keep that in mind too
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We're driving all the internal logic with the same clock so that shouldn't be an issue. The only frequencies we'll need are 25MHz and 50, 75, or 100.
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