Is HW breakpoint required for SW breakpoint ?

Hi,

Thanks for the follow up!

I'm afraid I cannot share any files or screenshots.

I will try to find a solution, but I cannot modify the project too much, especially regarding the memory layout. I will have to play around with the BSP, but I am looking for a theoretical solution or reasoning as to why a breakpoint is not able to be set.

I see the following possible issues:

1. Memory address that has the code to break is Off chip ddr2 and resides below the reset vector (nothing I can do about this). I read in some documentation that NIOS2 cannot view memory below its reset address.

2. debugack, debugAckReq, cpureset_req signals are not included. I may be able to experiment with that.

3. HW breakpoint and data trace need to be instantiated and non zero (that's my original question).

My setup: I boot from config flash QSPI (micron), alt load runs the pre-boot loader, the pre-loader copies the application image from qspi to off chip ddr2 ram (off chip), and then jumps to execution on off chip ram. All my main() code and other code(s) are in this off-chip ram and below the reset vector.

.reset is at ON chip RAM, followed by .exceptions.

If there's nothing theoretically that can be suggested, or if there are particular questions, I may be able to check or answer.

Otherwise, you may snooze this thread for now. I will update here if I am able to make progress.

Thanks so much for your support!