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Altera_Forum's avatar
Altera_Forum
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11 years ago

IOWR/IORD latency

Hi all! Sorry for prvious empty thread, I have no idea what happened. I'm experiencing some strange latency when using IOWR macros. I've added added custom 8-bit slave to QSYS and got h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Nios 2 /e is a slow processor that required 5 clock cycles minimum to complete 1 instruction.

The overhead from the performance counter is larger in comparison to the total measured time per IORD instruction (30/50). I agree with Galfonz that you should perform iterations of IORD for more accuracy.

Also try to look at simulations. This would definitely be a better way to understand the behavior of the RTL.