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Altera_Forum
Honored Contributor
15 years agoIORD_ALTERA_AVALON_PIO_DATA to slow?
Hi, I'm trying to capture samples from an A/D Converter and streaming them onto a PC via an ethernet connection. I've extended the triple speed ethernet design example from the Nios II v9.1 instal...
Altera_Forum
Honored Contributor
15 years agoI have read this document. I have already successfully configured my hardware design. Now the issue is with programming. This is my first time working on NIOS system design. I am just confused about how to read data from an multi-bit input line. I hope my question is clear now.
By the way, in this particular case the system.h file defines the data width of BIU_STATUS_REG as 5 bits #define biu_status_reg_data_width 5 My question is, if I simply give the base address of the input line, will I still be able to read all the 5 bits???