IORD_ALTERA_AVALON_PIO_DATA to slow?

In order to read PIO data, with or without DMA, you need a single address, namely your PIO base address. The fifo will automatically pop a single data word on every access.

Using DMA you'll setup the read from this constant address (i.e. RCON bit for DMA controller core, not SGDMA) and the write (with WCON=0) to the buffer you choose, SRAM, DDR2, onchip RAM or whatever.

For SGDMA core you have the increment field in dma descriptor insted of RCON/WCON control bits.

I think it is possible to dma directly from PIO to TSE but this strongly depends on the ethernet protocol you need to use.