Honored Contributor
Honored ContributorMake sure the avalon slave is a 32bit one - otherwise you get a bus width adapter that will slow the transfer down a lot - especially if there is also a clock crossing bridge.
The two conditionals are also likely to lead to some mis-predicted branches - so you'll be seeing a pipeline stall. A 'taken branch' is also slower than the 'not taken branch' even when predicted properly. It might even be that you are waiting for an extra code cache line read. Also make sure you are compiling everything with -O2 (or -O3). With extreme care, it is possible to get the code to run (from tightly coupled instruction memory) without any pipeline stalls in the important paths.
