Forum Discussion

BBS3000's avatar
BBS3000
Icon for New Contributor rankNew Contributor
3 months ago

Intermittent alt_exception_unknown

Hello, I experience an intermittent alt_exception_unknown problem during data load on one of the fifoed_avalon_uart (IP version 9.3.0). The system instantiates a total of 7 fifoed_avalon_uart ports...
BBS3000's avatar
BBS3000
Icon for New Contributor rankNew Contributor
3 months ago

Hi Archer,

Thank you for such detailed response.

I found the latest version of the fifoed_avalon_uart (13.2) and will try it at some point.

Meanwhile I have a few comments.

I registered custom alt_instruction_exception_handler that has 3 parameters: cause, exception_pc and badaadr. It does not have exception_context parameter that you have mentioned.

My BSP does not have IORD_ALTERA_AVALON_UART_STATUS, ALTERA_AVALON_UART_STATUS_xxx_MSK definition. I guess they are for the standard UART. I can use their FIFOED_AVALON_UART_STATUS_xxx counterparts but some of them the driver uses for calling a corresponding ISR, so it seems that Overrun error is not considered as a problem.

e.g.
static void fifoed_avalon_uart_irq(void* context, alt_u32 id)
{
...
/*Read the status register in order to determine the cause of the interrupt. */
status = IORD_FIFOED_AVALON_UART_STATUS(base);
/* Clear any error flags set at the device */
IOWR_FIFOED_AVALON_UART_STATUS(base, 0);
/* process a read irq */
if (status & (FIFOED_AVALON_UART_STATUS_RRDY_MSK | FIFOED_AVALON_UART_STATUS_RX_TH_MSK |
FIFOED_AVALON_UART_STATUS_ROE_MSK | FIFOED_AVALON_UART_STATUS_TMT_MSK))
{
fifoed_avalon_uart_rxirq (sp, status);
}
...
}
Thanks!
Archer_Altera's avatar
Archer_Altera
Icon for Occasional Contributor rankOccasional Contributor
3 months ago

Hi @BBS3000,

Thanks for letting me know that you will try a newer version. It may be helpful in your usage scenario.

I see below case having some discussion about fifoed avalon uart. It has useful info, please refer to it.

Why "fifoed avalon uart" was removed from web site ? - Intel Community

For the driver part, it is not designed to consider all potential conditions and handle them properly as avalon uart IP. The designers have to evaluate the capability of the IP core they are using and find alternate solution if performance can't be satisfied. Such as using one more Nios core to offload part of processing task.

Regards,

Archer