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21 years agoI'm using an evaluation board based on cyclone EP1c20. Actually I' m using 16 pin on J16 (40 pinPROTO2 connector) for an OUTPUT PIO 16 bit wide.
From the reference manual seems that all the FPGA pins (except RESET_n) connected to j16 are general purpose, Isn't it? If yes let me go ahead..... I wanted to debug the system, so I slightly modified the "hello led" example adding a stupid loop in this way: "....... alt_u16 i; i=0; while(i<10){ IOWR_ALTERA_AVALON_PIO_DATA(OUT_PIO_BASE, 0); IOWR_ALTERA_AVALON_PIO_DATA(OUT_PIO_BASE, 0xa); IOWR_ALTERA_AVALON_PIO_DATA(OUT_PIO_BASE, 0xaa); IOWR_ALTERA_AVALON_PIO_DATA(OUT_PIO_BASE, 0xaaa); IOWR_ALTERA_AVALON_PIO_DATA(OUT_PIO_BASE, 0xaaaa); i++; } .......", what i see is the right sequence on OUT_PIO[0..15] up to the prefinal assignment but, on the last I see 0x8aaaa instead of 0xaaaa. It's not all. If I do this serie of assignments out of the loop, everithing works fine. Actually It works fine even if I do the assigments in a reversed order within the loop........ http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif Has someone an idea to suggest me?? Thanks