Interfacing custom module with Nios II

Ive given this a go now and seem to have "partially" got somewhere.

I created the Component in SOPC builder and put it into my design, however whats confusing me is that even though its linked up, in the SOPC module code, the module header is

module NIOS_AES (

// 1) global signals:

clk_0,

reset_n,

// the_AES_AvalonSlave_0

user_byteenable_from_the_AES_AvalonSlave_0,

user_chipselect_from_the_AES_AvalonSlave_0,

user_datain_10_to_the_AES_AvalonSlave_0,

user_datain_11_to_the_AES_AvalonSlave_0,

user_datain_12_to_the_AES_AvalonSlave_0,

user_datain_13_to_the_AES_AvalonSlave_0,

user_datain_9_to_the_AES_AvalonSlave_0,

user_dataout_0_from_the_AES_AvalonSlave_0,

user_dataout_10_from_the_AES_AvalonSlave_0,

user_dataout_11_from_the_AES_AvalonSlave_0,

user_dataout_12_from_the_AES_AvalonSlave_0,

user_dataout_13_from_the_AES_AvalonSlave_0,

user_dataout_1_from_the_AES_AvalonSlave_0,

user_dataout_2_from_the_AES_AvalonSlave_0,

user_dataout_3_from_the_AES_AvalonSlave_0,

user_dataout_4_from_the_AES_AvalonSlave_0,

user_dataout_5_from_the_AES_AvalonSlave_0,

user_dataout_6_from_the_AES_AvalonSlave_0,

user_dataout_7_from_the_AES_AvalonSlave_0,

user_dataout_8_from_the_AES_AvalonSlave_0,

user_dataout_9_from_the_AES_AvalonSlave_0,

user_read_from_the_AES_AvalonSlave_0,

user_write_from_the_AES_AvalonSlave_0

);

Why has the module header for my SOPC got inputs and outputs for my AES Avalon Slave module? I thought the whole point was that the Avalon Slave module would be encapsulated inside and controlled by the Nios II CPU?

I must have messed something up!?