Forum Discussion
intel Cyclone 10 GX NIOS-II I2C Slave problem
- 3 years ago
Hi,
We do not have an I2C slave IP unfortunately, but with the I2C Host IP in your design, other peripherals connected to the I2C are considered as the slaves already.
Maybe you could try to determine the master and slave by determining what devices will be connected to the I2C bus, which will be the master and what is the use case.
Hope this could clear your doubts. Thank you.
Regards,
Kelly
Hi,
The Intel FPGA Avalon® I2C (Host) core (altera_avalon_i2c ) is an IP which implements the I2C protocol. It supports only host mode with a bit-rate up to 400 kbits/s (fast mode) and it can also operate in a multi-host system. It has an Avalon® Memory-Mapped ( Avalon® -MM) agent interface for a host processor to access its control, status, command and data FIFO. Command and data FIFO can be configured to be accessible by either the Avalon® -MM or Avalon® Streaming ( Avalon® -ST). On the serial interface side, it provides two data and clock lines to communicate to remote I2C devices.
Thank you.
Regards,
Kelly
- ENG19993 years ago
New Contributor
Hi Kelly
If I need to make an I2C Slave device.
Which I2C IP can I use @@?~~
Thank you ^_^