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Altera_Forum's avatar
Altera_Forum
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12 years ago

Importing IP into SPOC builder

Hi all, I'm currently working on building an sopc builder and using on cyclone III target device. I have written a simple counter program to glow the LED's to familiarize myself with SOPC build...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

re: could you give the exact error message? i don't recall any error message from quartus that would say that.

does sopc builder say anything during generation? does the generated sopc component has all the ports that you need? did you instantiate it correctly in your top level file?

1.When i don't use Nios processor and generate SOPC, there are no error messages during generation.

2. But the HDL component file generated by the builder does not have the signals which are present in my design.

3. When i make this HDL component file generated, as the top module and compile using quartus, the following error is thrown

"Error (12061) : Can't synthesize current design -- Top partition does not contain any logic.", Which is obvious because the HDL file has no signals. But when i include the Nios Processor the generated HDL component file has the signals which are in my design and compiles without any error.