Implementing interrupt based PIO read for NIOS II

Cris,

Pls refer the .pdf attachment i have sent. i believe system clk you mean is clk to NIOS II system? in that case they are not from same source and may not be synchronous. rdclk is derived from input data stream and clk to NIOS II is from PLL. But does it really matter? bcoz my rdclk is just 250KHz and the clock to nios II and PIO is 85MHz from PLL.

Below is the program i have modified by sampling the raw data of edge capture register for rising edge and rden=1. The problem is my expected data pattern is not coming. Im expecting a data pattern of "ABCDEF001122334455......" but what i'm getting is "AB114466 779900000000111111..."

And tell me does rdclk not synchronous to NIOS II can cause this kind of prob?

static alt_u8 ch1_rden, ch1_data;

volatile int clk_edge;

int main(void)

{

# ifdef CH1_RDCLK_BASE

IOWR_ALTERA_AVALON_PIO_IRQ_MASK(CH1_RDCLK_BASE, 0x0);

IOWR_ALTERA_AVALON_PIO_EDGE_CAP(CH1_RDCLK_BASE, 0x1); /* Reset the edge capture register. */

while( 1 )

{

clk_edge=IORD_ALTERA_AVALON_PIO_EDGE_CAP(CH1_RDCLK_BASE);

if ((clk_edge==0x1) &&(ch1_rden=IORD_ALTERA_AVALON_PIO_DATA(CH1_RDEN_BASE ))==0x1)

{

ch1_data = IORD_ALTERA_AVALON_PIO_DATA(CH1_PIO_BASE);

printf("%02x, ", ch1_data);

}

IOWR_ALTERA_AVALON_PIO_EDGE_CAP(CH1_RDCLK_BASE, 0x1);

}

# endif

return 0;

}