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Altera_Forum
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15 years ago

Implementation of -fPIC (large mode) for Nios 'toolchain-mmu'

Hi, Unfortunately, it seems that MontaVista guys did not implement the Nios tool-chains to allow the GOT size more than 32Kbytes. So I tried to make those. The diff-files are attached below. No...
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Altera_Forum
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12 years ago

Hi,

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I apologize if I'm being dense (I'm not a Hardware Guy), but I skimmed that page without figuring out what it is that you'd like to know. Can you be clearer?

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Altera's original data cache lacks several features to make a SMP system, so I made my new one and attached it to Nios CPU from the outside. However, it's not an efficient cache because I can't use some Nios CPU's internal signals, e.g. the linear address signal, cache-uncache signal and cache hit signal, etc. If I could use those signals, I could run the SMP system faster. But this means that Altera is requested to disclose their source code.:)

I think that maybe the 'multi-core Nios2 SMP + linux + shielded CPU technique' system is a good solution for real-time systems from the viewpoint of its flexibility.

Kazu