Forum Discussion
Altera_Forum
Honored Contributor
20 years agohi kvinna,
It is fundamental and has nothing to do with nios (This is niosforum). Just follow the prompt: Before doing funtional simulation you shall generate functional simulation netlist yourself. It is under Processing menu->generate functional simulation netlist. You'd better do timing simulation instead of functional simulation because functional simulation results can not stand for the actual FPGA working situation. The real world can not exist without delay. If you want to do functional simulation you can turn to use modelsim to do that. It's more powerful than QII.