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Altera_Forum
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9 years ago

I get a big noise when I echo the audio data from microphone

I designed a audio system in Qsys. I read the fifo data from the microphone input and write it to the audio write fifo. Although I can hear the microphone echo, it also generate a very big noise. I c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Verilog is *not* a procedural language. For loops don't do things one by one, they infer hardware for each instance of the loop - so that will not do what you want.

You need to create a counter (always @ ... counter <= counter+ 1), and use that to read from your fifo.

EDIT:

Never mind, that was C code, I misread. Ignore the above.