HPS DDR memory access for Preloader and UBoot

A further note: once the DDR memory is "corrupted", I can restart the debug instance within DS-5 and get through the preloader as far as (and including) spl_board_init(), and then look at the 0x100 0040 memory window again, it's back to saying "U-Boot 2013.01.01 for socfpga bo" in the text string at 0x100 0020.

So clearly the DDR memory isn't getting corrupted, but DS-5's and the ARMs ability to read it has gone once it has the program counter moved to that addresss space.

I wondered whether it was the processor Instruction Cache that was causing the problem, so I disabled that using the control register in CP15 (as per ARM documentation), but exactly the same thing happened.

Any help or comments would be greatly appreciated.