Altera_Forum
Honored Contributor
20 years agohow to write the drivers
Hi:
I design a IP core about AD16bit , which is used to transfer the analogy to the digital and whose "hdl file " is belown: library ieee; use ieee.std_logic_1164.all; entity ad16bit is port(D :IN STD_LOGIC_VECTOR(15 DOWNTO 0); address: in std_logic_vector(1 downto 0); CLK ,STATUS,read: IN STD_LOGIC; byteenable: in std_logic_vector(3 downto 0); chipselect: in std_logic; CE,CS,A0,RC,K12X8: OUT STD_LOGIC; Q : out STD_LOGIC_VECTOR(31 DOWNTO 0)); end ad16bit; architecture behav of ad16bit is type state is (st0, st1, st2, st3,st4); signal current_state,next_state :state:=st0; signal data_reg_select: std_logic; signal control_reg_select: std_logic; SIGNAL data_reg : STD_LOGIC_VECTOR(31 DOWNTO 0); SIGNAL lock: STD_LOGIC; begin K12X8 <= '1'; process(address) begin data_reg_select<='0'; control_reg_select<='0'; case address is when "00" => data_reg_select<='1'; when "01" => control_reg_select<='1'; when others => null; end case; end process; process(current_state,status) begin case current_state is when st0 =>CE<='0';CS<='1'; A0<='1';RC<='1';LOCK<='0';next_state <= st1; when st1 =>CE<='1';CS<='0'; A0<='0';RC<='0';LOCK<='0'; next_state <= st2; when st2 =>CE<='1';CS<='0'; A0<='0';RC<='0';LOCK<='0'; IF (STATUS='1') THEN next_state <= st2; ELSE next_state <= st3; END IF ; when st3 =>CE<='1';CS<='0'; A0<='0';RC<='1';LOCK<='0'; next_state <= st4; when st4 =>CE<='1';CS<='0'; A0<='0';RC<='1';LOCK<='1'; next_state <= st0; when others =>CE<='0';CS<='1'; A0<='1';RC<='1';LOCK<='0';next_state <= st0; end case; end process; PROCESS (clk,control_reg_select,chipselect) BEGIN IF ( clk'EVENT AND clk='1') THEN if (control_reg_select and chipselect)='1' then current_state <= next_state; end if; END IF; END PROCESS ; process(lock,byteenable) BEGIN IF LOCK='1' AND LOCK'EVENT THEN if byteenable(0)='1' then data_reg(7 downto 0)<=d(7 downto 0);end if; if byteenable(1)='1' then data_reg(15 downto 8)<=d(15 downto 8);end if; if byteenable(2)='1' then data_reg(23 downto 16)<="00000000";end if; if byteenable(3)='1' then data_reg(31 downto 24)<="00000000";end if; END IF; END PROCESS ; process(read,clk,data_reg_select) begin if clk'event and clk='1' then if (read and data_reg_select)='1' then Q <= data_reg; else Q<=(others=>'Z'); end if; end if ; end process; END behav; the IP core has connected to the avalon ,but I didn't design the drivers about the IP core ,and the nios--system's generation is successful. Now I want to use the niosII to control the ad16bit , like a mcu--At89c52 controling a AD0809, how to work and how to design the drivers about the IP core ad16bit?!! thanks advance.