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Altera_Forum
Honored Contributor
14 years agoFirst of all You need to set up hardware side correctly:
1) Add interrupt signal for Avalon interconnect. 2) Add write interface to Your Avalon interconnect (will tell You why later). The hardware fires interrupt, which must be held at least for 30-50 clk cycles, but the usual practice is to set interrupt_done flag through the write interface I've mentioned in (2). You assert interrupt signal in hardware and leave it high. When the Nios fires interrupt, the first thing inside interrupt You must do is to write to that interface signal (mentioned in (2)) and deassert interrupt signal. Then in software, You firstly initialize UART: IOWR_ALTERA_AVALON_UART_STATUS(UART_BASE,0); IOWR_ALTERA_AVALON_UART_CONTROL(UART_BASE, ALTERA_AVALON_UART_CONTROL_RRDY_MSK); alt_irq_register(uart_irq_interface, NULL, uart_interrupt_procedure);