Contributor
Contributorgot it. thank you for the support, i am using the example for further evaluation.
Occasional ContributorTerasic told me that the DE23-Lite board uses the same FPGA - SDRAM combination and there is an example there. I used it as a starting point for my Atum A3 board.
Now if only they would show us how to use the ethernet port!
New ContributorHello,
Ethernet example design for DE23-lite board is not yet released to public. Tentative plan is to get this example design by then end of Q4'2025. I will let you know once the example design is available. Till then stay tuned!.
Thanks
Occasional ContributorHi AvinashTH
Is there a plan to release an example for the Atum A3 board as that is the one I am using? Or will the DE23-lite example work with the Atum A3 Nano?
Thanks
New ContributorHello,
Terasic has released Atum A3 board example design, here is the path of example design on github (github.com/terasic/Atum-A3-Nano); To clarify, this does not have Ethernet example design and as i mentioned Ethernet example design is planned for near future release. Does this answer your question ?
Thanks,
ContributorThank you for the information, i will check the examples for DE23-lite board. And I also plan to use the Ethernet interface in our design. it seems we have similar requirements.
Occasional ContributorHi Rainwang,
I can confirm that the IP used for the DE23-lite board does work on the Atum A3. I just took the verilog files and used them to create a module in Platform designer. I was then able to read and write to the SDRAM from a RiscFree c program.
Regards
