How to set Speed: 100 Mbits full duplex instead oft Auto-negotiation on DE2-115 board

Once you have configured the TSE MAC with the correct PHY address (register mdio_addr0 or mdio_addr1, described on page 6-5 of the TSE's datasheet) the MDIO registers are directly mapped as TSE registers (see MDIO space 0 and MDIO space 1 on page 6-2).

If you are using Altera's driver with the Interniche TCP/IP stack, after initialization the PHY address is already set up in mdio_addr1 so you can directly access the MDIO registers in MDIO space 1.