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Altera_Forum
Honored Contributor
10 years agoYou don't need a fifo core....
The fifo core is only if you want to buffer avalon streaming data to avalon memory mapped data. I'm not sure how you are using the ADCs but my suspicion is that it is done through NIOS. Hence all you need to do is safe the sampled data into an array in C code (i.e. buffering in on-chip ram). The when you send out your uart information, you will be taking data out of that array. In another one of your threads I posted a link to code that used uart interrupts. In that code, buffers are also used to store data for send out and collect incoming data. They were RxBuffer and TxBuffer. Look through that code, you should get an idea of how to use these buffer arrays. If you want to use SDRAM, then you need to use IOWR and IORD functions to write your ADC data to specific SDRAM addresses, and then read the data out to send via uart. It's easier to use on-chip ram if you have the memory blocks.