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Altera_Forum
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11 years ago

How to read a 24-bit signed signal from VHDL block fed in Nios II system - always +ve

HI, I have a very simple question but I have no idea what went wrong. Basically I have a 24-bit signed signal from VHDL block fed into Nios II system. I use C code for NIos II system. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The easiest way to sign extend a number is: 


 wire  numAs24 = -24'd1245
wire  numAs32 = {{(8){numAs24}},numAs24};

Granted the above is in Verilog, but it should be easy to turn it into the equivalent VHDL. Basically all it does is copy bit 23 into all of the upper bits.