Honored Contributor
Honored ContributorHi Scott,
I retry run u-boot in epcs4 and it successed. Reset Address: epcs_controller, base address=0x00400000. Exception Address: sdram, 8M, base address=0x01000000. Am29DL323GB Flash: 4M, base address:=0x00000000. Here is the information in hyper-terminal <div class='quotetop'>QUOTE </div> --- Quote Start --- U-Boot 1.1.3 (Sep 26 2005 - 22:44:56) CPU : Nios-II SYSID : 8a712a61, Mon Sep 26 12:41:05 2005 BOARD : Microtronix Cyclone 1C20 Kit WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode WARNING: flash_make_cmd: unsuppported LittleEndian mode# # Unknown FLASH on Bank 0 - Size = 0x00000000 = 0 MB *** Warning - bad CRC, using default environment ==>[/b] --- Quote End --- So, I have some question to ask you. 1. WARNING: flash_make_cmd: unsuppported LittleEndian mode # # Unknown FLASH on Bank 0 - Size = 0x00000000 = 0 MB I do not know what is the reason and how to correct. I use cfi_flash.c you send to me. 2. I do it as you replied to DW. But I still have questions. <div class='quotetop'>QUOTE </div> --- Quote Start --- 1. Create the u-boot flash file with elf2flash and these parameters: $ elf2flash --epcs --base=0x0 --end=0x7fffffff --flash=U15 --input=u-boot --output=u-boot.flash --boot=boot_loader_epcs.srec[/b] --- Quote End --- Here, --base is epcs base or cfi flash base. If it is cfi flash, why --end=0x7fffffff. <div class='quotetop'>QUOTE </div> --- Quote Start --- 2. Download u-boot to the epcs device. $ nios2-flash-programmer --epcs --input=u-boot.flash --sof=<path to pgm sof> 3. Create the configuration flash file. $ sof2flash --epcs --input=<path to your system sof> --offset=0x0 --output=config.flash 4. Download the configuration flash file to the epcs device. $ nios2-flash-programmer --epcs --input=config.flash --sof=<path to pgm sof> --relocate[/b] --- Quote End --- Here, what address the u-boot.flash download to? I have read nios-flash-programmer-guide. In Booting From EPCS Serial Configuration Devices part, it says The flash programmer first checks the size of the FPGA configuration data, then appends the software content to the end of it in the EPCS device. Is flash-programmer can know to distribute the address space of configuration data and u-boot.flash intelligently? --relocate: relocate code following a sof <epcs mode only>. Are all data address in epcs distributed by --relocate parameter, and --relocate is only used in programming fpga config data to epcs? The data in epcs are in the sequence below, .sof ----- 0x0 boot_loader_srec(or store in on-chip rom), u-boot When run, u-boot is relocated by boot_loader_srec to run in sdram text_base. Right? Thank you, LiangYi
