How to make sure nios send a single cycle control signal to peripheral?

You specify yourself the number of wait cycles when you create the component in SOPC builder. With the default values, a read signal is active during two cycles and a write signal during one cycle, so your code should be fine and you don't need to detect an edge on the avalon control signals.

For your second question, I don't know. I stopped trying to understand how the CPU does the 8-bit accesses and just do everything with 32-bit data busses. It saves a lot of trouble ;)

I think that the CPU is trying to do an 8-bit access but the switching fabric divides it in 4 8-bit accesses, but I'm not sure.