Forum Discussion
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- 100 cores of what? Nios relies on the Avalon Bus - usually with the Nios acting as the master and other units connected via a memory mapped avalon interface. This way you can have any existing IP or any other IP you chose to design yourself (as avalon is a straight forward interface, very similar to AXI). NoC is usually a term used for Asic, not FPGA. --- Quote End --- So, basicaly Altera is lying to the publich with the "NoC" based interconnection. https://www.altera.com/en_us/pdfs/literature/wp/wp-01149-noc-qsys.pdf